[chore] 整理include

include/interrupt/gdt.h

@@ -0,0 +1,61 @@
+#pragma once
+
+#include <efi.h>
+
+// GDT selectors
+#define GDT_NULL        0x00
+#define GDT_KERNEL_CODE 0x08
+#define GDT_KERNEL_DATA 0x10
+#define GDT_USER_CODE   0x18
+#define GDT_USER_DATA   0x20
+#define GDT_TSS         0x28
+
+// GDT entry
+struct gdt_entry {
+    UINT16 limit_low;
+    UINT16 base_low;
+    UINT8  base_mid;
+    UINT8  access;
+    UINT8  granularity;
+    UINT8  base_high;
+} __attribute__((packed));
+
+// GDT pointer
+struct gdt_ptr {
+    UINT16 limit;
+    UINT64 base;
+} __attribute__((packed));
+
+// TSS (Task State Segment) — 64-bit mode uses only RSP0 and IST1-7
+struct tss {
+    UINT32 reserved0;
+    UINT64 rsp0;
+    UINT64 rsp1;
+    UINT64 rsp2;
+    UINT64 reserved1;
+    UINT64 ist1;
+    UINT64 ist2;
+    UINT64 ist3;
+    UINT64 ist4;
+    UINT64 ist5;
+    UINT64 ist6;
+    UINT64 ist7;
+    UINT64 reserved2;
+    UINT16 reserved3;
+    UINT16 iopb_offset;
+} __attribute__((packed));
+
+// TSS descriptor in GDT (system segment, 16 bytes)
+struct tss_descriptor {
+    UINT16 limit_low;
+    UINT16 base_low;
+    UINT8  base_mid;
+    UINT8  access;
+    UINT8  granularity;
+    UINT8  base_high;
+    UINT32 base_upper;
+    UINT32 reserved;
+} __attribute__((packed));
+
+void gdt_init(void);
+void gdt_set_kernel_stack(UINT64 stack);  // sets TSS.RSP0

include/interrupt/idt.h

@@ -0,0 +1,48 @@
+#pragma once
+
+#include <efi.h>
+
+// IDT entry (64-bit gate descriptor)
+struct idt_entry {
+    UINT16 offset_low;
+    UINT16 selector;
+    UINT8  ist;          // IST index (bits 0-2), reserved (bits 3-6), type (bit 7)
+    UINT8  type_attr;    // P (bit 7), DPL (bits 5-6), 0 (bit 4), type (bits 0-3)
+    UINT16 offset_mid;
+    UINT32 offset_high;
+    UINT32 reserved;
+} __attribute__((packed));
+
+struct idt_ptr {
+    UINT16 limit;
+    UINT64 base;
+} __attribute__((packed));
+
+// Interrupt frame saved by ISR stubs
+struct trap_frame {
+    // Pushed by ISR stub (general-purpose registers)
+    UINT64 r11;
+    UINT64 r10;
+    UINT64 r9;
+    UINT64 r8;
+    UINT64 rdi;
+    UINT64 rsi;
+    UINT64 rdx;
+    UINT64 rcx;
+    UINT64 rax;
+    // Pushed by ISR stub (metadata)
+    UINT64 vector;
+    UINT64 error_code;
+    // Pushed by CPU (interrupt frame)
+    UINT64 rip;
+    UINT64 cs;
+    UINT64 rflags;
+    UINT64 rsp;
+    UINT64 ss;
+} __attribute__((packed));
+
+// Handler function type
+typedef void (*isr_handler_t)(trap_frame*);
+
+void idt_init(void);
+void idt_set_handler(UINT8 vector, isr_handler_t handler);

include/interrupt/pic.h

@@ -0,0 +1,20 @@
+#pragma once
+
+#include <efi.h>
+
+// 8259 PIC ports
+#define PIC1_CMD    0x20
+#define PIC1_DATA   0x21
+#define PIC2_CMD    0xA0
+#define PIC2_DATA   0xA1
+
+// PIC vectors
+#define PIC_IRQ_BASE 0x20  // IRQ 0 mapped to vector 0x20 (32)
+
+// EOI signal
+#define PIC_EOI     0x20
+
+void pic_init(void);
+void pic_send_eoi(UINT8 irq);
+void pic_mask_irq(UINT8 irq);
+void pic_unmask_irq(UINT8 irq);

include/interrupt/pit.h

@@ -0,0 +1,18 @@
+#pragma once
+
+#include <efi.h>
+
+// PIT I/O ports
+#define PIT_CHANNEL0_DATA  0x40
+#define PIT_COMMAND_PORT   0x43
+
+// PIT frequency
+#define PIT_BASE_FREQ     1193182   // 1.193182 MHz
+#define PIT_TICK_HZ       100       // 100 Hz tick (10ms per tick)
+
+// Timer tick callback type
+typedef void (*timer_callback_t)(void);
+
+void pit_init(void);
+void pit_set_tick_handler(timer_callback_t handler);
+UINT64 pit_get_ticks(void);